Probabilistic processors challenge quantum computing

Emphasis Hardware Innovation

Probabilistic computer

It seems that quantum computers truly have a worthy rival – if not in computing power, at least in terms of technological readiness.

After Japanese researchers developed a probabilistic computer using silicon technology, it was now the turn of Shuhan Yang and colleagues from the National University of Singapore, who not only presented their probabilistic hardware but also put on a show in terms of implementing practical applications.

A probabilistic computer, or p-computer, uses naturally random building blocks called probabilistic bits, or p-bits . Unlike the bits in traditional computers, which must have defined values ​​(0 or 1), p-bits do not have a specific value; they oscillate between values, closely mimicking qubits. This is why probabilistic computing is considered a bridge to quantum computing —with the major advantage that it operates at room temperature.

Yang and his colleagues built a probabilistic computer based on magnetic tunnel junctions, nanoscale components that can generate randomness in a natural and adjustable way. It’s a step forward from spintronics, which in itself is a promising path to running combinatorial optimization applications faster and more  energy- efficiently .

And, to leave no room for doubt about this new computational architecture, the team immediately presented two computing platforms based on the same principle.

Probabilistic processors challenge quantum computing.

Comparison of sequential and parallel implementations, revealing an exceptional performance gain. [Image: Shuhan Yang et al. – 10.1038/s41467-026-72020-8] 

Winning against quantum computing

The first prototype is a parallel probabilistic Ising processor based on innovative components called magnetic tunnel junctions (sMTJs) integrating 144 compact and swivel spintronic random number generators, assembled in a massively parallel architecture – all p-bits communicate with all others.

When applied to quadratic assignment problems, a computationally demanding class of optimization problems, the new processor achieved a 3.2-fold speed increase and a 58.3% energy saving, compared to the same implementation in a traditional electronic CPU (central processing unit).

To test quantum computing, the team compared their system to the most modern commercial quantum computers, manufactured by D-Wave. In quadratic assignment problems, the probabilistic processor consistently produced feasible, high-quality solutions across the entire dataset, while D-Wave’s annealing quantum processors struggled to return feasible solutions as the problem size increased.

This comparison highlights the potential of probabilistic computing as a practical short-term alternative for real-world optimization workloads.

“Quantum computing remains a promising long-term direction, but many optimization problems need practical solutions today,” said Professor Yang. “Our results show that spintronic probabilistic computing can provide significant gains in speed, energy efficiency, and solution quality, using a hardware platform much closer to practical implementation.”

Probabilistic processors challenge quantum computing.

Second prototype built by the team. [Image: Shuhan Yang et al. – 10.1038/s41467-026-72020-8] 10 times better

The second prototype is a larger probabilistic Ising machine , consisting of 250 magnetic tunneling junctions for spin transfer torque.

The implementations showed that a clustered parallel update method allows for a 10-fold speedup for sparsely connected graphs without altering the hardware. The researchers also experimentally demonstrated that simulated quantum annealing improved solution quality by 20 times compared to conventional simulated annealing, in addition to increasing robustness to device variability.

“By combining stochastic magnetic devices with parallel architectures and advanced annealing algorithms, we can accelerate optimization while reducing power consumption,” said Yang. “Instead of treating randomness as a source of error, we utilize it as a computational resource.”

Together, the two demonstrations cover crucial challenges in probabilistic computing: performance, scalability, energy efficiency, and the quality of the solutions generated.

The team now aims to further expand its hardware capabilities and explore integrated architectures for large-scale probabilistic computing. These chips could enable energy-efficient computing platforms for AI, logistics, planning, financial modeling, communications, and electronic project automation, the team says.

Source: www.inovacaotecnologica.com.br
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